1. Field of the Invention
This invention relates to a new and improved circuit configuration for use in bias circuits of input stages suitable for use, for example, in operational amplifiers.
2. Prior Art
The use of junction field effect transistors (JFET'S) as input devices for operational amplifiers is well established, and the advantages are well known. For example, FIG. 1 shows JFET's J1 and J2 connected in a manner common to the prior art. It is also well known that many integrated circuit operational amplifiers using JFET's as input devices exhibit excessive input voltage offset (V.sub.os), noise, and drift characteristics due to contributions of the bipolar transistor active loads.